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general description the max5170/max5172 low-power, serial, voltage-out- put, 14-bit digital-to-analog converters (dacs) feature a precision output amplifier in a space-saving 16-pin qsop package. the max5170 operates from a +5v single supply and the max5172 operates from a +3v single supply. both devices draw only 280? of supply current, which reduces to 1? in shutdown. in addition, the programmable power-up reset feature allows for a user-selectable power-up output voltage of either 0 or midscale. the 3-wire serial interface is compatible with spi, qspi, and microwire standards. an input regis- ter followed by a dac register provides a double- buffered input, allowing the input and dac registers to be updated independently or simultaneously with a 16- bit serial word. additional features include software and hardware shutdown, shutdown lockout, a hardware clear pin, and a reference input capable of accepting dc and offset ac signals. these devices provide a pro- grammable digital output pin for added functionality and a serial-data output pin for daisy-chaining. all logic inputs are ttl/cmos-compatible and are internally buffered with schmitt triggers to allow direct interfacing to optocouplers. the max5170/max5172 incorporate a proprietary on-chip circuit that keeps the output voltage virtually ?litch free, limiting the glitches to a few millivolts during power-up. both devices are available in 16-pin qsop packages and are specified for the extended (-40? to +85?) tempera- ture range. for 100% pin-compatible dacs with internal reference, see the 13-bit max5130/max5131 and the 12- bit max5120/max5121 data sheets. applications industrial process controls digital offset and gain adjustment motion control automatic test equipment (ate) remote industrial controls ?-controlled systems features ? lsb inl 1? shutdown current ?litch free?output voltage at power-up single-supply operation +5v (max5170) +3v (max5172) full-scale output range +2.048v (max5172, v ref = +1.25v) +4.096v (max5170, v ref = +2.5v ) rail-to-rail output amplifier adjustable output offset low thd (-80db) in multiplying operation spi/qspi/microwire-compatible 3-wire serial interface programmable shutdown mode and power-up reset (0 or midscale) buffered output capable of driving 5k ? || 100pf loads user-programmable digital output pin allows serial control of external components pin-compatible upgrade to the 12-bit max5174/max5176 max5170/max5172 low-power, serial, 14-bit dacs with voltage output ________________________________________________________________ maxim integrated products 1 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 os v dd n.c. ref agnd pdl upo dout dgnd top view max5170 max5172 qsop out rs cs shdn clr din sclk 19-1478; rev 1; 9/02 part max5170 aeee max5170beee max5172 aeee -40? to +85? -40? to +85? -40? to +85? temp range pin-package 16 qsop 16 qsop 16 qsop pin configuration ordering information max5172beee -40? to +85? 16 qsop inl (lsb) ? ? ? ? functional diagram appears at end of data sheet. spi and qspi are trademarks of motorola, inc. microwire is a trademark of national semiconductor corp. rail-to-rail is a registered trademark of nippon motorola, ltd. for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
max5170/max5172 low-power, serial, 14-bit dacs with voltage output 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics max5170 (v dd = +5v ?0%, v ref = 2.5v, os = agnd = dgnd, r l = 5k ? , c l = 100pf referenced to ground, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to agnd, dgnd ............................................-0.3v to +6.0v agnd to dgnd.....................................................-0.3v to +0.3v digital inputs to dgnd..........................................-0.3v to +6.0v dout, upo to dgnd ................................-0.3v to (v dd + 0.3v) out, ref to agnd ...................................-0.3v to (v dd + 0.3v) os to agnd ...............................(agnd - 4.0v) to (v dd + 0.3v) maximum current into any pin............................................50ma continuous power dissipation (t a = +70?) 16-pin qsop (derate 8mw/? above +70?)..............667mw operating temperature range ...........................-40? to +85? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? conditions units min typ max symbol parameter bits 14 resolution max5170a ? max5170b lsb ? inl integral nonlinearity (note 1) lsb ? dnl differential nonlinearity mv ?0 v os offset error (note 2) r l = lsb -0.6 ? ge gain error r l = 5k ? -1.6 ? ?/v 10 120 psrr power-supply rejection ratio f = 100khz lsbp-p 1 output noise voltage nv/ hz 80 output thermal noise density v 0v dd - 1.4 v ref reference input range k ? 18 r ref reference input resistance v ref = 0.5vp-p + 1.5v dc , slew-rate limited khz 350 reference -3db bandwidth v ref = 1.5 vp-p + 1.5v dc , f = 10khz, code = 3fff hex db 82 sinad signal-to-noise plus distortion ratio v 3 v ih input high voltage v 0.8 v il input low voltage mv 200 v hys input hysteresis v in = 0 or v dd ? 0.001 ? i in input leakage current pf 8 c in input capacitance i source = 2ma v v dd - 0.5 v oh output high voltage i sink = 2ma v 0.13 0.4 v ol output low voltage v ref = 3.6vp-p + 1.8v dc , f = 1khz, code = all 0s db -80 reference feedthrough static performance reference multiplying-mode performance digital inputs digital outputs
max5170/max5172 low-power, serial, 14-bit dacs with voltage output _______________________________________________________________________________________ 3 electrical characteristics max5170 (continued) (v dd = +5v ?0%, v ref = 2.5v, os = agnd = dgnd, r l = 5k ? , c l = 100pf referenced to ground, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) conditions v/? 0.6 sr voltage output slew rate v 0v dd output voltage swing (note 3) k ? 80 120 os pin input resistance ? 40 time required to exit shutdown units min typ max symbol parameter cs = v dd , f sclk = 100khz, v sclk = 5vp-p nv-s 1 digital feedthrough v 4.5 5.5 v dd positive supply voltage ma 0.28 0.4 i dd power-supply current (note 4) ? 110 shutdown current (note 4) ns 100 t cp sclk clock period ns 40 t ch sclk pulse width high ns 40 t cl sclk pulse width low ns 40 t css cs fall to sclk rise setup time ns 40 t ds din setup time ns 0 t dh din hold time c load = 200pf ns 80 t do1 sclk rise to dout valid propagation delay c load = 200pf ns 80 t do2 sclk fall to dout valid propagation delay ns 10 t cs0 sclk rise to cs fall delay ns 100 t csw cs pulse width high ns 0 t csh sclk rise to cs rise hold time ns 40 t cs1 cs rise to sclk rise hold time to ?.5lsb, from 10mv to full-scale ? 18 output settling time dynamic performance power supplies timing characteristics
max5170/max5172 low-power, serial, 14-bit dacs with voltage output 4 _______________________________________________________________________________________ electrical characteristics max5172 (v dd = +2.7v to +3.6v, v ref = 1.25v, os = agnd = dgnd, r l = 5k ? , c l = 100pf referenced to ground, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?). bits 14 resolution max5172a ? v ref = 1.6vp-p + 0.8v dc , f = 1khz, code = all 0s db max5172b lsb ? inl integral nonlinearity (note 5) lsb ? dnl differential nonlinearity mv ?0 conditions v os offset error (note 2) r l = lsb -0.6 ? ge gain error r l = 5k ? -1.6 ? -80 ?/v 10 120 psrr power-supply rejection ratio f = 100khz lsbp-p 2 output noise voltage nv/ hz 80 output thermal noise density v 0v dd - 1.4 v ref reference input range k ? 18 r ref reference input resistance v ref = 0.5vp-p + 0.75v dc , slew-rate limited khz 350 reference -3db bandwidth v ref = 0.6vp-p + 0.9v dc , f = 10khz, code = 3fff hex db 78 sinad signal-to-noise plus distortion ratio reference feedthrough v 2.2 v ih input high voltage v 0.8 v il input low voltage mv 200 v hys input hysteresis v in = 0 or v dd ? 0.001 ? i in input leakage current units min typ max symbol parameter pf 8 c in input capacitance i source = 2ma v v dd - 0.5 v oh output high voltage i sink = 2ma v 0.13 0.4 v ol output low voltage static performance reference multiplying-mode performance digital input digital output
max5170/max5172 low-power, serial, 14-bit dacs with voltage output _______________________________________________________________________________________ 5 note 1: inl guaranteed between codes 40 and 16383. note 2: offset is measured at the code that comes closest to 10mv. note 3: accuracy is better than 1.0 lsb for v out = 10mv to v dd - 180mv. guaranteed by psr test on end points. note 4: r l = open and digital inputs are either v dd or dgnd. note 5: inl guaranteed between codes 80 and 16383. electrical characteristics max5172 (continued) (v dd = 2.7v to 3.6v, v ref = 1.25v, os = agnd = dgnd, r l = 5k ? , c l = 100pf referenced to ground, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?). ? 110 shutdown current (note 4) ns 150 t cp sclk clock period ns 75 t ch sclk pulse width high ns 75 conditions t cl sclk pulse width low ns 60 t css csb fall to sclk rise setup time ns 0 t csh sclk rise to cs rise hold time ns 60 t ds din setup time ns 0 t dh din hold time c load = 200pf ns 200 t do1 sclk rise to dout valid propagation delay ns 75 t cs1 cs rise to sclk rise hold time c load = 200pf ns 200 t do2 sclk fall to dout valid propagation delay to ?.5lsb from 10mv to full-scale ? 18 output settling time ns 10 t cs0 sclk rise to cs fall delay ns 150 t csw cs pulse width high v/? 0.6 sr voltage output slew rate v 0 v dd output voltage swing (note 3) k ? 80 120 os pin input resistance ? 40 time required to exit shutdown units min typ max symbol parameter cs = v dd , f sclk = 100khz, v sclk = 3vp-p nv-s 1 digital feedthrough v 2.7 3.6 v dd positive supply voltage ma 0.28 0.4 i dd power-supply current (note 4) dynamic performance power supplies timing characteristics
max5170/max5172 low-power, serial, 14-bit dacs with voltage output 6 _______________________________________________________________________________________ typical operating characteristics (max5170: v dd = +5v, v ref = 2.5v; max5172: v dd = +3v, v ref = 1.25v; c l = 100pf, os = agnd, code = 3fff hex, t a = +25?, unless otherwise noted.) 230 260 250 240 270 280 290 300 310 320 330 4.4 4.8 4.6 5.0 5.2 5.4 5.6 no-load supply current vs. supply voltage max5170/72 toc01 supply voltage (v) no-load supply current ( a) 268 270 272 274 276 278 280 282 284 286 288 290 -50 -30 -10 10 30 50 70 90 no-load supply current vs. temperature max5170/72 toc02 temperature (?) no-load su0pply current ( a) 0.8 1 0.9 1.2 1.1 1.3 1.4 -50 10 30 -30 -10 50 70 90 shutdown supply current vs. temperature max5170/72 toc03 temperature ( c) shutdown current ( a) 4.0960 4.0962 4.0966 4.0964 4,0968 4.0970 -50 -10 -30 10 30 50 70 90 output voltage vs. temperature max5170/72 toc04 temperature ( c) output voltage (v) v out 1v/div v cs 5v/div 5v 4.096v 10mv 0 dynamic response max5170/72 toc07 2 s/div 4.5 0 10 1k 10k 100 100k output voltage vs. load resistance 0.5 max5170/72 toc05 r l ( ? ) output voltage (v) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v out 1v/div v cs 5v/div 5v 4.096v 10mv 0 dynamic response max5170/72 toc06 2 s/div 10k 100k -84 -83 -82 -81 -79 -80 -78 -77 -76 -75 10 100 1k total harmonic distortion plus noise vs. frequency max5170/72 toc08 frequency (hz) thd + noise (db) v out /v ref 12.5db/div 20 0 10k reference feedthrough max5170/72 toc9 frequency (hz) v ref = 1.8v dc + 3.6vp-p at f = 1khz max5170
max5170/max5172 low-power, serial, 14-bit dacs with voltage output _______________________________________________________________________________________ 7 v out /v ref 12.5db/div 20 0 100k fft plot max5170/72 toc10 frequency (hz) v ref = 1.25v dc + 1.13vp-p, at f = 10khz v cs 2v/div v out 100mv/div major-carry transition max5170/72 toc11 5 s/div v out 2mv/div ac- coupled v sclk 5v/div digital feedthrough max5170/72 toc12 400ns/div -25 -15 -20 -5 -10 0 5 0 1000 1500 500 2000 2500 3000 reference input frequency response max5170/72 toc13 frequency (khz) gain (db) v ref = 0.67v p-p + 1.5v dc v dd 1v/div v out 10mv/div ac-coupled start-up glitch max5170/72 toc14 50ms/div max5170 max5172 260 270 275 280 275 290 285 295 -50 -10 10 -30 30 50 70 90 no-load supply current vs. temperature max5170/72 toc16 temperature ( c) no-load supply current ( a) 250 260 255 270 265 280 275 285 295 290 300 2.5 2.7 2.8 2.9 2.6 3 3.1 3.2 3.4 3.3 3.5 no-load supply current vs. supply voltage supply voltage (v) no-load supply current ( a) max5170/72 toc15 0.44 0.48 0.46 0.52 0.5 0.58 0.56 0.54 0.60 -50 -10 -30 10 30 50 70 90 shutdown supply current vs. temperature max5170/72 toc17 temperature ( c) supply current ( a) typical operating characteristics (continued) (max5170: v dd = +5v, v ref = 2.5v; max5172: v dd = +3v, v ref = 1.25v; c l = 100pf, os = agnd, code = 3fff hex, t a = +25?, unless otherwise noted.)
max5170/max5172 low-power, serial, 14-bit dacs with voltage output 8 _______________________________________________________________________________________ 2.5 -0.5 10 100 1k 10k 100k output voltage vs. load resistance 0 1.0 2.0 max5170/72 toc19 r l ( ? ) output voltage (v) 0.5 1.5 v cs 3v/div 3v 10mv 2.048v 0 v out 500mv/div dynamic response max5170/72 toc20 2 s/div v cs 3v/div 3v 10mv 2.048v 0 v out 500mv/div dynamic response max5170/72 toc21 2 s/div -78.0 10 100 1k 10k 100k total harmonic distortion plus noise vs. frequency -81.0 -80.5 -80.0 -79.5 -79.0 -78.5 -81.5 -82.0 max5170/72 toc22 frequency (hz) thd + noise (db) out 100mv/div 5 s/div major-carry transition max5170/72 toc25 cs 2v/div ac-coupled v out /v ref 12.5db/div 20 0 10k reference feedthrough max5170/72 toc23 frequency (hz) v ref = 0.8v dc + 1.6v p-p at f = 1khz fft plot max5170/72 toc24 frequency (hz) v out /v ref 12.5db/div 20 0 100k v ref = 0.9v dc + 0.424v p-p at f = 10khz out 500 v/div 2 s/div sclk 2v/div digital feedthrough (sclk, out) max5170/72 toc26 ac-coupled 2.0480 2.0482 2.0484 2.0488 2.0486 2.0490 -50 -30 -10 10 30 50 70 90 output voltage vs. temperature max5170/72 toc18 temperature ( c) output voltage (v) max5172 typical operating characteristics (continued) (max5170: v dd = +5v, v ref = 2.5v; max5172: v dd = +3v, v ref = 1.25v; c l = 100pf, os = agnd, code = 3fff hex, t a = +25?, unless otherwise noted.)
max5170/max5172 low-power, serial, 14-bit dacs with voltage output _______________________________________________________________________________________ 9 -30 -20 -25 -10 -15 0 -5 5 0 1000 1500 500 2000 2500 3000 reference input frequency response max5170/72 toc27 frequency (khz) gain (db) v ref = 0.67vp-p + 0.75v dc v dd 1v/div v out 10mv/div start-up glitch max5170/72 toc28 50ms/div ac-coupled max5172 9 dgnd digital ground 13 agnd analog ground 15 n.c. no connection name function 1 os offset adjustment. connect to agnd for no offset. 16 v dd positive supply. bypass to agnd with a 4.7? capacitor in parallel with a 0.1? capacitor. pin 14 ref reference input. maximum v ref is v dd - 1.4v. 11 upo user-programmable output. state is set by the serial input. 12 shdn shutdown (digital input). pulling shdn high when pdl = v dd places the chip in shutdown with a maximum shutdown current of 10?. 10 dout serial-data output 5 clr clear dac (digital input). clears the dac to either zero or midscale as determined by rs. 7 din serial-data input (digital input). data is clocked in on the rising edge of sclk. 8 sclk serial clock input (digital input) 6 cs chip select input (digital input). din ignored when cs is high. 3 rs reset mode select (digital input). connect to v dd to select midscale reset output voltage. connect to dgnd to select 0 reset output voltage. 4 pdl power-down lockout (digital input). connect to v dd to allow shutdown. connect to dgnd to disable software and hardware shutdown. 2 out voltage output. high impedance when in shutdown. the output voltage is limited to v dd . pin description typical operating characteristics (continued) (max5170: v dd = +5v, v ref = 2.5v; max5172: v dd = +3v, v ref = 1.25v; c l = 100pf, os = gnd, code = 3fff hex, t a = +25?, unless otherwise noted.)
max5170/max5172 low-power, serial, 14-bit dacs with voltage output 10 ______________________________________________________________________________________ detailed description the max5170/max5172 14-bit, serial, voltage-output dacs operate with a 3-wire serial interface. these devices include a 16-bit shift register and a double- buffered input composed of an input register and a dac register (see functional diagram ). in addition, these devices employ a rail-to-rail output amplifier and internally trimmed resistors to provide a gain of +1.638v/v, maximizing the output voltage swing. the max5170/max5172? offset adjust pin allows for a dc shift in the dac output. the dacs are designed with an inverted r-2r ladder network (figure 1) which pro- duces a weighted voltage proportional to the reference voltage. reference inputs the reference input accepts both ac and dc values with a voltage range extending from 0 to v dd - 1.4v. the following equation represents the resulting output voltage: where n is the numeric value of the dac? binary input code (0 to 16383), v ref is the reference voltage, and gain is the internal set voltage gain (+1.638v/v if os = agnd). the maximum output voltage is v dd . the refer- ence pin has a minimum impedance of 18k ? and is code dependent. output amplifier with os connected to agnd, the output amplifier employs an internal, trimmed resistor-divider setting the gain to +1.638v/v and minimizing gain error. the out- put amplifier has a typical slew rate of 0.6v/? and set- tles to ?.5lsb from a full-scale transition within 18?, when loaded with 5k ? in parallel with 100pf. loads less than 2k ? degrade performance. for alternative output amplifier setups, refer to the applications information section. shutdown mode the max5170/max5172 feature a software- and hard- ware-programmable shutdown mode that reduces the typical supply current to 1?. enter shutdown by writing the appropriate input-control word as shown in table 1 or by using the hardware shutdown. in shutdown mode, the reference input and the amplifier output become high-impedance and the serial interface remains active. data in the input register is saved, allowing the max5170/max5172 to recall the prior output state when returning to normal operation. exit shutdown by reloading the dac register from the shift register, by simultaneously loading the input and dac registers, or by toggling pdl . when returning from shutdown, wait 40? for the output to settle. power-down lockout power-down lockout disables the software/hardware shutdown mode. a high-to-low transition brings the device out of shutdown and returns the output to its previous state. shutdown pulling shdn high while pdl is high places the max5170/max5172 in shutdown. pulling shdn low will not return the device to normal operation. a high-to-low transition on pdl or an appropriate command from the serial data line (see table 1 for commands) is required to exit shutdown. serial-interface the max5170/max5172 3-wire serial interface is com- patible with spi, qspi (figure 2) and microwire (figure 3) interface standards. the 16-bit serial input word consists of two control bits and 14 bits of data (msb to lsb). the control bits determine the max5170/max5172? operation as outlined in table 1. the max5170/ max5172? digital inputs are double buffered, which allows any of the following: loading the input register without updating the dac register updating the dac register from the input register updating the input and dac registers simultaneously. v v x n x gain out ref = 16384 out os r r shown for all 1s on dac d0 d10 d11 d12 2r 2r 2r 2r 2r rrr ref agnd figure 1. simplified dac circuit diagram
max5170/max5172 low-power, serial, 14-bit dacs with voltage output ______________________________________________________________________________________ 11 the max5170/max5172 accepts one 16-bit packet or two 8-bit packets sent while cs remains low. the max5170/max5172 allow the following to be config- ured: clock edge on which serial data output (dout) is clocked out state of the user-programmable logic output configuration of the reset state. specific commands for setting these are shown in table 1. the general timing diagram in figure 4 illustrates how the max5170/max5172 acquire data. cs must go low at least t css before the rising edge of the serial clock (sclk). with cs low, data is clocked into the register on the rising edge of sclk. the maximum serial clock frequency guaranteed for proper operation is 10mhz for max5170 and 6mhz for max5172. see figure 5 for a detailed timing diagram of the serial interface. serial data output (dout) the serial-data output, dout, is the internal shift regis- ter? output and allows for daisy-chaining of multiple devices as well as data readback (see applications information ). by default upon start-up, data shifts out of dout on the serial clock? rising edge (mode 0) and provides a lag of 16 clock cycles, thus maintaining spi, qspi, and microwire compatibility. however, if the device is programmed for mode 1, the output data lags din by 16.5 clock cycles and is clocked out on the ser- ial clock? rising edge. during shutdown, dout retains its last digital state prior to shutdown. load input register; dac registers are updated (start-up dac with new data). 1 0 load input register; dac registers are unchanged. 0 0 14-bit dac data 14-bit dac data 16-bit serial word d13..................d0 c1 function c0 no operation (nop). 1 1 0 0 x xxx xxxx xxxx x x x xxx xxxx xxxx update dac register from input register (start-up dac with data previously stored in the input registers). 0 1 upo goes low (default). 1 1 1 0 0 xxx xxxx xxxx 0 1 x xxx xxxx xxxx mode 1, dout clocked out on sclk? rising edge. 1 1 1 1 0 xxx xxxx xxxx 1 0 1 xxx xxxx xxxx upo goes high. 1 1 shut down dac (provided pdl = 1). 1 1 mode 0, dout clocked out on sclk? falling edge (default). 1 1 1 1 1 xxx xxxx xxxx sclk din cs mosi sck +5v i/o cpol = 0, cpha = 0 spi/qspi port ss max5170 max5172 figure 2. connections for spi and qspi interface sclk din cs sk so i/o microwire port max5170 max5172 figure 3. connections for microwire interface standards table 1. serial-interface programming commands
max5170/max5172 low-power, serial, 14-bit dacs with voltage output 12 ______________________________________________________________________________________ user-programmable logic output (upo) the upo allows control of an external device through the serial interface, thereby reducing the number of microcontroller i/o pins required. during power-down, this output retains its digital state prior to shutdown. when clr is pulled low, upo resets to its programmed default state. see table 1 for specific commands to control the upo. reset (rs) and clear ( clr ) the max5170/max5172 offers a clear pin which resets the output voltage. if rs = dgnd, then clr resets the output voltage to the minimum voltage (0 if os = agnd). if rs = v dd , then clr resets the output volt- age to midscale. in either case, clr resets upo to its programmed default state. cs sclk din command executed 9 8 16 1 c0 c1 d00 d13 d12 d11 d10 d09 d06 d05 d04 d03 d02 d01 d08 d07 figure 4. serial-interface timing diagram cs sclk din dout t csw t cs1 t csh t css t cso t d02 t ch t cl t cp t d01 t ds t dh figure 5. detailed serial-interface timing diagram
max5170/max5172 low-power, serial, 14-bit dacs with voltage output ______________________________________________________________________________________ 13 applications information unipolar output figure 6 shows the max5170/max5172 configured for unipolar, rail-to-rail operation with a gain of +1.638v/v. table 2 lists the codes for unipolar output voltages. the maximum output voltage is limited to v dd . use the os pin to introduce an offset voltage as shown in figure 7 and described in the offset and buffer configurations section. bipolar output figure 8 shows the max5170/max5172 configured for bipolar output operation. the output voltage is given by the following equation (os = agnd): where n represents the numeric value of the dac? binary input code, v ref is the voltage of the external reference. table 3 shows digital codes and the corre- sponding output voltage for figure 8? circuit. vv n out ref =? ? ? ? ? ? ? , 2 16 384 1 x agnd dgnd max5170 max5172 dac ref os out 10k 10k v- v+ v dd v out +5v/+3v figure 8. bipolar output circuit figure 7. setting os for output offset max5170 max5172 dac agnd dgnd ref out os v os +5v/+3v v dd table 2. unipolar code table (circuit of figure 6) max5170 max5172 dac ref out os dgnd agnd +5v/+3v v dd figure 6. unipolar output circuit (rail-to-rail) table 3. bipolar code table (circuit of figure 8) dac contents msb lsb analog output +v ref [(2 ?16383/16384) - 1] 11 1111 1111 1111 10 0000 0000 0001 +v ref [(2 ?8193/16384) - 1] +v ref [(2 ?8192/16384) - 1] 10 0000 0000 0000 01 1111 1111 1111 +v ref [(2 ?8191/16384) - 1] +v ref [(2 ?1/16384) - 1] 00 0000 0000 0001 00 0000 0000 0000 -v ref analog output +v ref (16383/16384) 1.638 +v ref (8193/16384) 1.638 +v ref (8192/16384) 1.638 +v ref (8191/16384) 1.638 +v ref (1/16384) 1.638 0 00 0000 0000 0000 00 0000 0000 0001 01 1111 1111 1111 10 0000 0000 0000 10 0000 0000 0001 11 1111 1111 1111 dac contents msb lsb
max5170/max5172 low-power, serial, 14-bit dacs with voltage output 14 ______________________________________________________________________________________ offset and buffer configurations the simple circuit of figure 7 illustrates how to intro- duce an offset to the output voltage. the amount of off- set introduced by a voltage at the os pin is shown in the following equation: v offset = v os x (1 - gain) where gain = 1.638. however, the total output voltage of the device cannot exceed v dd regardless of the volt- age on the os pin. to set the gain of the output amplifier to 1, connect os to out. daisy-chaining devices the serial data output pin (dout) allows multiple max5170/max5172s to be daisy-chained together, as shown in figure 9. the advantage of this is that only two lines are needed to control all the dacs on the line. the disadvantage is that it takes n commands to program the dacs. figure 10 shows several max5170/max5172s sharing one common din signal line. in this configura- tion, the data bus is common to all devices. however, more i/o lines are required for this configuration because each device requires a dedicated cs line. the advan- tage of this configuration is that only one command is needed to program any dac. using an ac reference the max5170/max5172 accepts reference voltages with ac components as long as the reference voltage remains between 0 and v dd - 1.4v. figure 11 shows a technique for applying an offset sine wave signal to ref. the reference voltage must remain above agnd. power-supply and layout considerations wire-wrap boards are not recommended. for optimum system performance, use printed circuit boards with separate analog and digital ground planes. connect the two ground planes together at the low-impedance power-supply source. connect dgnd and agnd pins together at the ic. the best ground connection is achieved by connecting the dac? dgnd and agnd pins together and connecting that point to the system analog ground plane. this is useful because if the dac? dgnd is connected to the system digital ground, digital noise may get through to the dac? analog portion. bypass the power supply with a 4.7? capacitor in paral- lel with a 0.1? capacitor to agnd. minimize their lead lengths to reduce inductance. if noise becomes an issue, use shielding and/or ferrite beads to increase iso- lation. to maintain inl and dnl performance as well as gain drift, it is extremely important to provide the lowest possi- ble reference output impedance at the dac reference input pin. inl degrades if the series resistance on ref pin exceeds 0.1 ? . the same consideration must be made for the agnd pin. to other serial devices max5170 max5172 din sclk cs max5170 max5172 max5170 max5172 din dout dout dout sclk cs din sclk cs figure 9. daisy-chaining max5170/max5172 devices
max5170/max5172 low-power, serial, 14-bit dacs with voltage output ______________________________________________________________________________________ 15 to other serial devices max5170 max5172 din sclk cs max5170 max5172 din sclk cs max5170 max5172 din sclk cs din sclk cs1 cs2 cs3 figure 11. ac reference input circuit dac out max5170 max5172 r 2 r 1 os ref v dd gnd agnd +5v/ +3v ac reference input 500mvp-p max495 +5v/+3v figure 10. multiple max5170/max5172s sharing common din and sclk lines chip information transistor count: 3457
max5170/max5172 low-power, serial, 14-bit dacs with voltage output maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. shdn pdl rs clr sclk din cs max5170 max5172 serial control 16-bit shift register decode control input register dac register logic output dac dout upo os out ref dgnd agnd v dd functional diagram qsop.eps package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)

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